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INTEGRATED CIRCUITS
DATA SHEET
PCF8831 STN RGB - 160 output row driver
Preliminary specification 2002 Aug 14
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
CONTENTS 1 2 3 4 5 6 7 7.1 7.2 7.3 7.4 8 9 10 11 11.1 12 13 14 15 16 17 18 FEATURES APPLICATIONS GENERAL DESCRIPTION ORDERING INFORMATION BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Row driver 80-bit shift register Row control Frame control LIMITING VALUES HANDLING DC CHARACTERISTICS AC CHARACTERISTICS Power-up and power-down sequences APPLICATION INFORMATION INTERNAL PROTECTION CIRCUITS BONDING PAD LOCATION TRAY INFORMATION DATA SHEET STATUS DEFINITIONS DISCLAIMERS
PCF8831
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
1 FEATURES 2 APPLICATIONS
PCF8831
* Row driver for LCD dot matrix * 160 row outputs * Selectable scan direction * Support of display off function * Support of N-line inversion * Programmable connection to display module * Logic supply voltage: 2.4 to 3.5 V * Display supply voltage range: 15 to 40 V * Low power consumption; suitable for battery operated systems * CMOS compatible inputs * Manufactured in silicon gate CMOS process. 4 ORDERING INFORMATION
* Mobile phones * Personal Digital Assistant (PDA) * Automotive information systems * Point-of-sale terminals * Instrumentation. 3 GENERAL DESCRIPTION
The PCF8831 is a row driver for driving colour STN displays. It is designed to operate with the PCF8832 column driver IC.
PACKAGE TYPE NUMBER NAME PCF8831U - chip with bumps in tray DESCRIPTION VERSION -
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
5 BLOCK DIAGRAM
PCF8831
handbook, full pagewidth
R0 to R159
VMH VH VM VL
160
ROW DRIVERS
. . . . .
RP ROWRES1 RCLK
SHIFT REGISTER 1
SHIFT REGISTER 2
. . . . .
PCF8831
ROW CONTROL SW1 SW2 R1F T1 T2 T3 T4 T5
MGW629
VSS VDD
ROWRES2
FI SVM
Fig.1 Block diagram.
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
6 PINNING SYMBOL R159 to R0 RCLK RP FI PAD(1) 2 to 161 187 188 189 TYPE O I I I LCD row outputs DESCRIPTION
PCF8831
clock input to the shift register; data is transmitted with the positive clock edge; connect RCLK to the RCLK output of the PCF8832 column driver row pulse input; driven by the RP output of the PCF8832 column driver frame inversion input; controls frame and N-line inversion; FI is synchronized internally by the rising edge of RCLK; FI can change only when RP changes; connect FI to the FI output of the PCF8832 column driver input that switches the non-selected level (VM or VSS, depending on ROWRES2) to all row outputs; connect SVM to the SVM output of the PCF8832 column driver external reset input 1; when LOW, the shift register is reset at the next rising edge of RCLK and all outputs (R0 to R159) go to their non-selected level; connect ROWRES1 to the RESROW output of the PCF8832 column driver external reset input 2; when LOW, the non-selected level goes to VSS; when HIGH, the non-selected level goes to VM; connect ROWREST to the RESROW output of the PCF8832 column driver inputs R1F (row block 1 first), SW1 (swap row block 1) and SW2 (swap row block 2) control the shift direction through the register and the order of the register; see Table 1; connect to the corresponding signal outputs of the PCF8832 column driver, or connect directly to VDD or VSS as required by the display module configuration test inputs; connect to VSS for normal operation logic power supply, negative; normally connected to system ground logic power supply, positive; 2.4 to 3.5 V referred to VSS MID-level LCD driving voltage; level is between VH and VL; output at rows for non-selecting periods when ROWRES2 is HIGH; 1.25 to 2.0 V referred to VSS auxiliary supply voltage for row switch; higher than VM; limited at VL + 40 V HIGH-level LCD driving voltage; top level of the positive selecting pulse of row outputs LOW-level LCD driving voltage; bottom level of the negative selecting pulse of row outputs
SVM
190
I
ROWRES1
191
I
ROWRES2
192
I
R1F SW1 SW2
193 194 195
I I I
T1 to T5 VSS VDD VM VMH VH VL Note
196 to 200 201 to 207 208 to 214 215 to 221 222 to 228 229 to 235 236 to 242
I PS PS PS PS PS PS
1. Dummy pads are located at positions 1 (slanted), 162 to 186 and 243 to 272.
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
7 7.1 FUNCTIONAL DESCRIPTION Row driver 7.2 80-bit shift register
PCF8831
The row driver comprises high voltage outputs, level shifters and logic circuits. The row driver power supplies are: * VH for the top level of selecting pulses * VL for the bottom level of selecting pulses * VM for the non-selecting level when ROWRES2 = HIGH; the non-selecting level goes to VSS when ROWRES2 = LOW (active) * VMH is an intermediate auxiliary supply * VDD and VSS for the logic circuits.
Two shift registers of 80 bits each are contained in the PCF8831 row driver. With ROWRES1, the complete shift register will be reset at the next rising edge of RCLK. The two shift registers can be configured for different applications by row control signals R1F, SW1 and SW2. 7.3 Row control
Row control signals SW1, SW2 and R1F control the shift direction through the register and the order of the register (see Fig.2). Some switching combinations require the order of one or both shift registers to be swapped as shown by the example in Fig.3. All row control combinations are shown in Table 1, these can be software controlled when connected to the corresponding row control signals of the PCF8832 column driver.
ndbook, full pagewidth
LCD ROW OUTPUTS R0 R79 R80
LCD ROW OUTPUTS R159
. . . . .
SW1 SW2 R1F
SHIFT REGISTER 1
SW1 SW2 R1F
SHIFT REGISTER 2
SW1 SW2 0 0 1 1 0 1 0 1
SHIFT DIRECTION
SHIFT DIRECTION
. . . . .
LCD ROW OUTPUTS
MGW630
Fig.2 Shift directions; R1F = 1.
handbook, full pagewidth
LCD ROW OUTPUTS R79 R0 R159
R80
. . . . .
SW1 SW2 R1F
SHIFT REGISTER 1
SW1 SW2 R1F
SHIFT REGISTER 2
MGW631
Fig.3 Row swapping; SW1 = SW2 = 1.
2002 Aug 14
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. . . . .
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
Table 1 Row control switching ROW CONTROL SIGNALS R1F 1 1 1 1 0 0 0 0 SW1 0 0 1 1 0 0 1 1 SW2 0 1 0 1 0 1 0 1 FIRST REGISTER SELECTED R0 to R79 R0 to R79 R79 to R0 R79 to R0 R80 to R159 R159 to R80 R80 to R159 R159 to R80
PCF8831
SECOND REGISTER SELECTED R80 to R159 R159 to R80 R80 to R159 R159 to R80 R0 to R79 R0 to R79 R79 to R0 R79 to R0
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
7.4 Frame control
PCF8831
The signal FI controls frame inversion (Fig.4) and N-line inversion (Fig.5). Software control of FI is performed via the PCF8832 column driver.
handbook, full pagewidth
Frame n FI
Frame n + 1
VH R0 VM VL VH R1 VM VL VH R2 VM VL
. . . . .
. . . . .
VH
R159
VM VL
MGW632
Fig.4 Frame inversion.
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
PCF8831
handbook, full pagewidth
FI
VH R0 VM VL VH R1 VM VL VH R2 VM VL VH R3 VM VL VH R4 VM VL VH R5 VM VL
MGW633
Fig.5 N-line inversion; N = 2.
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
8 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); note 1. SYMBOL VDD VSS VMH VH VM PARAMETER logic supply positive voltage logic supply negative voltage auxiliary supply voltage for row switching HIGH-level LCD driving voltage MID-level LCD driving voltage MIN. VSS - 0.3 VL - 0.3 VL - 0.3 VL - 0.3 VL - 0.3 VH - 45.0 VSS - 0.3 VI Toper Tstg Note input voltage operating temperature storage temperature VSS - 0.3 -40 -65 MAX. VSS + 7.0 VL + 40.0 VL + 45.0 VL + 45 VH + 0.3 VL + 45.0 VSS + 7.0 VDD + 0.3 +85 +150
PCF8831
UNIT V V V V V V V V C C
1. Parameters are valid over the operating temperature range; all voltages are referred to VL; substrate potential = VL; unless otherwise specified. 9 HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is recommended to take normal precautions appropriate to handling MOS devices (see "Handling MOS Devices").
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
10 DC CHARACTERISTICS (VDD - VSS) = 2.4 to 3.5 V; (VH - VL) = 15 to 55 V; Tamb = -40 to +85 C; unless otherwise specified. SYMBOL VL VH VM VMH VSS VDD VIH VIL ILI PARAMETER LOW-level LCD driving voltage HIGH-level LCD driving voltage MID-level LCD driving voltage auxiliary supply voltage for row switching logic supply negative voltage logic supply positive voltage HIGH-level input voltage LOW-level input voltage input leakage current all inputs; referred to VSS all inputs; referred to VSS all inputs VI = VDD VI = VSS RO row output on-state resistance notes 2 and 3 IO = +100 A IO = 100 A IO = -100 A IDD IVH IVMH IVM IVL Notes current at pad VDD current at pad VH current at pad VMH current at pad VM current at pad VL notes 3, 4 and 5 - - - - - - - - 600 600 600 30 10 3 2 13 tbf tbf tbf tbf tbf tbf tbf tbf - -5 - - 5 - CONDITIONS - VL + 15.0 VSS note 1 VM - 2.0 VSS + 2.4 MIN. 0 - VL + VH ------------------2 VM + 10 - - TYP. -
PCF8831
MAX.
UNIT V V V V V V V
VL + 45.0 VDD VL + 40 VM - 1.25 VSS + 3.5 VDD
VSS + 0.8 x - (VDD - VSS) VSS -
VSS + 0.2 x V (VDD - VSS) A A A A A A A
1. The minimum level of (VMH - VM) depends on (VM - VL); a lower level of (VM - VL) requires lower offset of VMH referred to VM. A higher level of (VMH - VM) improves dynamic behaviour. A minimum level of (VMH - VM) = 2.5 V + 0.2 x (VM - VL) should be maintained. 2. Row outputs tested one at a time. VH + VL 3. (VH - VL) = 37 V; VMH = VH; (VDD - VSS) = 2.8 V; V M = ------------------- ; (VM - VSS) = 1.47 V. 2 4. fRCLK = 19.2 kHz; SVM = 0; ROWRES1 = ROWRES2 = HIGH; single line mode; all row outputs open-circuit. f RCLK 5. Frame inversion frequency f FI = ------------------ . 2 x 160
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
11 AC CHARACTERISTICS (VDD - VSS) = 2.4 to 3.5 V; (VH - VL) = 15 to 55 V; Tamb = -40 to +85 C; see Fig.6. SYMBOL fRCLK tRCLKL tRCLKH tr tf tsu(D) th(D) PARAMETER RCLK clock frequency RCLK clock LOW time RCLK clock HIGH time input rise time RCLK, RP, FI, SVM, ROWRES1 and ROWRES2 input fall time RCLK, RP, FI, SVM, ROWRES1 and ROWRES2 data setup time RP, FI and ROWRES1 data hold time RP, FI and ROWRES1 - 100 100 - - 50 50 MIN. - - - - - - TYP. 19.2 - - 50 50 - -
PCF8831
MAX. 700
UNIT kHz ns ns ns ns ns ns
handbook, full pagewidth
t RCLKL
tf
tr
RCLK t RCLKH
tr
tf
RP, FI, ROWRES1
MGW634
t su(D)
t h(D)
Fig.6 AC waveforms showing RCLK and data input.
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
11.1 Power-up and power-down sequences
PCF8831
When the PCF8831 is powering-up or powering-down, the various supply voltages and some interface signals have to be applied in a certain sequence. Table 2 Power-up and power-down sequences Tamb = -40 to +85 C; refer to Figs 7 and 8. SYMBOL td(VDD-VH) td(VDD-VMH) td(VDD-VL) td(VH-VDD) td(VMH-VDD) td(VL-VDD) tPU(VH-SVM) tPU(VL-SVM) PARAMETER delay VDD(on) to VH(on) delay VDD(on) to VMH(on) delay VDD(on) to VL(on) delay VH(off) to VDD(off) delay VMH(off) to VDD(off) delay VL(off) to VDD(off) power-up time VH(on) to SVM inactive power-up time VL(on) to SVM inactive note 1 note 1 note 2 note 1 note 1 note 2 SVM falls to VSS SVM falls to VSS SVM falls to VSS release ROWRES1 before making SVM inactive CONDITIONS 0 0 0 0 0 0 0 0 0 0 MIN. UNIT ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
tPU(VMH-SVM) power-up time VMH(on) to SVM inactive trel(RES1-SVM) ROWRES1 release time to SVM inactive trel(RES1) trel(RES2) tPD(VH) tPD(VMH) tPD(VL) Notes ROWRES1 release time ROWRES2 release time power-down time from SVM active to VH(off) power-down time from SVM active to VMH(off) power-down time from SVM active to VL(off)
allow at least one rising RCLK edge 50 before releasing ROWRES1 define VM when ROWRES2 is inactive; note 3 0 0 0 0
1. With no VH or VMH supply, both pads VH and VMH are clamped by separate internal diodes to VDD, see Fig.10. 2. When no VL is supplied, pad VL is clamped to VSS by a separate internal diode, see Fig.10. 3. When ROWRES2 is active (at VSS), the level not-selected goes to VSS and pad VM can be disconnected.
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
PCF8831
handbook, full pagewidth
VDD t d(VDD-VH)
VDD VSS VH
VH
(1)
> VSS + 8 V
t d(VDD-VMH) VMH VMH
(1)
> VSS + 8 V
t d(VDD-VL)
(2)
VL
< VSS - 5.5 V VL t PU(VH-SVM) t PU(VMH-SVM) t PU(VL-SVM)
SVM t rel(RES1-SVM) ROWRES1
RCLK t rel(RES1) VM VM t rel(RES2) ROWRES2
MGW635
(3)
(1) With no VH or VMH supply, both pads VH and VMH are clamped by separate internal diodes to VDD; see Table 2 and Fig.10. (2) When no VL is supplied, pad VL is clamped to VSS by a separate internal diode; see Table 2 and Fig.10. (3) When ROWRES2 is active (at VSS), the level not-selected goes to VSS and VM can be disconnected; see Table 2 and Fig.10.
Fig.7 Power-up sequence.
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
PCF8831
handbook, full pagewidth
VDD t d(VH-VDD) VH
(1)
VDD VSS
t d(VMH-VDD) VMH
(1)
t d(VL-VDD)
(2)
VL
t PD(VH) t PD(VMH) t PD(VL) SVM
VM t rel(RES2) ROWRES2
(3)
MGW636
(1) With no VH or VMH supply, both pads VH and VMH are clamped by separate internal diodes to VDD; see Table 2 and Fig.10. (2) When no VL is supplied, pad VL is clamped to VSS by a separate internal diode; see Table 2 and Fig.10. (3) When ROWRES2 is active (at VSS), the level not-selected goes to VSS and pad VM can be disconnected; see Table 2 and Fig.10.
Fig.8 Power-down sequence.
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
12 APPLICATION INFORMATION
PCF8831
VDD handbook, full pagewidth
VDD VH R0 R1 VMH 160 R2
PCF8831
VL T1 to T5 (1) R159
LCD DISPLAY (128 x 160 dots)
VCOL
VM VSS C0 9 (2) Row control VM VCOL LCK
384 C383
PCF8832
LCK
FBQ CA1 VDD1 VDD3 VSS
MGW637
CA2
VDD2
(1) Test inputs T1 to T5 have to be tied to VSS. (2) Row control signals are RCLK, RP, FI, SVM, RESROW1, RESROW2, SW1, SW2 and R1F.
Fig.9 Application example using PCF8831 with PCF8832.
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
13 INTERNAL PROTECTION CIRCUITS
PCF8831
handbook, full pagewidth VH
VH
pads 229 to 235
VMH VMH
pads 222 to 228
VDD VDD
pads 208 to 214
VM VM
pads 215 to 221
VSS VSS
pads 201 to 207
VL VL
pads 236 to 242
RCLK pad RP FI SVM ROWRES1 ROWRES2 R1F SW1 SW2 T1 T2 T3 T4 T5
187 188 189 190 191 192 193 194 195 196 197 198 199 200
VDD
VH
R0 to R159 pads 161 to 2 VSS
VL
MGW639
Protection diode maximum forward current = 5 mA.
Fig.10 Protection circuit diagrams.
2002 Aug 14
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Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
14 BONDING PAD INFORMATION Table 3 Pad locations All x and y coordinates are referenced to the centre of the chip (dimensions in m; see Fig.13) SYMBOL Dummy (slanted) R159 R158 R157 R156 R155 R154 R153 R152 R151 R150 R149 R148 R147 R146 R145 R144 R143 R142 R141 R140 R139 R138 R137 R136 R135 R134 R133 R132 R131 R130 R129 R128 R127 R126 R125 2002 Aug 14 PAD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 x -6116.0 -5984.0 -5909.0 -5834.0 -5759.0 -5684.0 -5609.0 -5534.0 -5459.0 -5384.0 -5309.0 -5234.0 -5159.0 -5084.0 -5009.0 -4934.0 -4859.0 -4784.0 -4709.0 -4634.0 -4559.0 -4484.0 -4409.0 -4334.0 -4259.0 -4184.0 -4109.0 -4034.0 -3959.0 -3884.0 -3809.0 -3734.0 -3659.0 -3584.0 -3509.0 -3434.0 y -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 18
PCF8831
SYMBOL R124 R123 R122 R121 R120 R119 R118 R117 R116 R115 R114 R113 R112 R111 R110 R109 R108 R107 R106 R105 R104 R103 R102 R101 R100 R99 R98 R97 R96 R95 R94 R93 R92 R91 R90 R89 R88 R87 R86 R85 R84
PAD 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77
x -3359.0 -3284.0 -3209.0 -3134.0 -3059.0 -2984.0 -2909.0 -2834.0 -2759.0 -2684.0 -2609.0 -2534.0 -2459.0 -2384.0 -2309.0 -2234.0 -2159.0 -2084.0 -2009.0 -1934.0 -1859.0 -1784.0 -1709.0 -1634.0 -1559.0 -1484.0 -1409.0 -1334.0 -1259.0 -1184.0 -1109.0 -1034.0 -959.0 -884.0 -809.0 -734.0 -659.0 -584.0 -509.0 -434.0 -359.0
y -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
PCF8831
SYMBOL R83 R82 R81 R80 R79 R78 R77 R76 R75 R74 R73 R72 R71 R70 R69 R68 R67 R66 R65 R64 R63 R62 R61 R60 R59 R58 R57 R56 R55 R54 R53 R52 R51 R50 R49 R48 R47 R46 R45 R44 R43 2002 Aug 14
PAD 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118
x -284.0 -209.0 -134.0 -59.0 +91.0 +166.0 +241.0 +316.0 +391.0 +466.0 +541.0 +616.0 +691.0 +766.0 +841.0 +916.0 +991.0 +1066.0 +1141.0 +1216.0 +1291.0 +1366.0 +1441.0 +1516.0 +1591.0 +1666.0 +1741.0 +1816.0 +1891.0 +1966.0 +2041.0 +2116.0 +2191.0 +2266.0 +2341.0 +2416.0 +2491.0 +2566.0 +2641.0 +2716.0 +2791.0
y -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 19
SYMBOL R42 R41 R40 R39 R38 R37 R36 R35 R34 R33 R32 R31 R30 R29 R28 R27 R26 R25 R24 R23 R22 R21 R20 R19 R18 R17 R16 R15 R14 R13 R12 R11 R10 R9 R8 R7 R6 R5 R4 R3 R2
PAD 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159
x +2866.0 +2941.0 +3016.0 +3091.0 +3166.0 +3241.0 +3316.0 +3391.0 +3466.0 +3541.0 +3616.0 +3691.0 +3766.0 +3841.0 +3916.0 +3991.0 +4066.0 +4141.0 +4216.0 +4291.0 +4366.0 +4441.0 +4516.0 +4591.0 +4666.0 +4741.0 +4816.0 +4891.0 +4966.0 +5041.0 +5116.0 +5191.0 +5266.0 +5341.0 +5416.0 +5491.0 +5566.0 +5641.0 +5716.0 +5791.0 +5866.0
y -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0 -768.0
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
PCF8831
SYMBOL R1 R0 Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy RCLK RP FI SVM ROWRES1 ROWRES2 R1F SW1 SW2 T1 T2 T3 T4 T5 2002 Aug 14
PAD 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200
x +5941.0 +6016.0 +6155.0 6096.5 6021.5 5796.5 5721.5 5646.5 5571.5 5496.5 5421.5 5346.5 5271.5 5196.5 5121.5 5046.5 4971.5 4896.5 4821.5 4746.5 4671.5 4596.5 4521.5 4446.5 3921.5 3846.5 3771.5 3506.0 3350.0 3186.0 3030.0 2866.0 2710.0 2546.0 2214.0 2050.0 1894.0 1730.0 1574.0 1410.0 1254.0
y -768.0 -768.0 -768.0 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 20
SYMBOL VSS VSS VSS VSS VSS VSS VSS VDD VDD VDD VDD VDD VDD VDD VM VM VM VM VM VM VM VMH VMH VMH VMH VMH VMH VMH VH VH VH VH VH VH VH VL VL VL VL VL VL
PAD 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241
x 1139.0 1064.0 989.0 865.0 790.0 661.5 586.5 326.7 251.7 176.7 101.7 26.7 -48.3 -123.3 -882.9 -957.9 -1032.9 -1107.9 -1182.9 -1257.9 -1332.9 -1630.7 -1705.7 -1780.7 -1855.7 -1930.7 -2005.7 -2080.7 -2334.3 -2409.3 -2484.3 -2559.3 -2634.3 -2709.3 -2784.3 -3013.5 -3088.5 -3163.5 -3238.5 -3313.5 -3388.5
y 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
PCF8831
SYMBOL VL Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy
PAD 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262
x -3463.5 -3728.5 -3803.5 -3878.5 -3953.5 -4103.5 -4178.5 -4253.5 -4328.5 -4403.5 -4478.5 -4553.5 -4628.5 -4703.5 -4778.5 -4853.5 -4928.5 -5003.5 -5078.5 -5153.5 -5228.5
y +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7
SYMBOL Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy Dummy
PAD 263 264 265 266 267 268 269 270 271 272
x -5303.5 -5378.5 -5453.5 -5528.5 -5603.5 -5678.5 -5753.5 -5978.5 -6053.5 -6128.5 5909.0 -5866.0
y +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7 +865.7
Alignment marks (see Fig.12) Alignment circle 1 Alignment circle 2 Table 4 865.7 +865.7
Bonding pad dimensions PAD SIZE 75 tbf 50 x 80 x 17.5 (5) 381 UNIT m m m m
Minimum pad pitch Pad size; aluminium Bump dimensions Wafer thickness (excluding bumps)
handbook, halfpage
12.66 mm
handbook, halfpage
2.36 mm
PCF8831
y centre
pitch
100 m
x centre
MGS688 MGW640
Fig.11 Bonding pads.
Fig.12 Alignment mark detail.
2002 Aug 14
21
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
PCF8831
handbook, full pagewidth
pad 163 circle 2
pad 162
R0
pad 186 RCLK RP FI SVM ROWRES1 ROWRES2 R1F SW1 SW2 T1 T2 T3 T4 T5 VSS
PC8831-1
. . . . .
x
VDD
. . . . .
0,0
y
R79 R80
. . . . .
12.66 mm
VM
VMH
VH
VL pad 243
Dummy bump Alignment mark
circle 1 pad 272
. . . . .
R159
pad 1
2.238 mm
MGW638
Circles 1 and 2 are alignment marks (see Fig.12).
Fig.13 Bonding pad location.
2002 Aug 14
22
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
15 TRAY INFORMATION
PCF8831
handbook, full pagewidth
x
A
C
y D
B F
E
MGS488
The dimensions are given in Table 5.
Fig.14 Tray details.
Table 5
Tray dimensions DESCRIPTION pocket pitch, x direction pocket pitch, y direction pocket width, x direction pocket width, y direction tray width, x direction tray width, y direction number of pockets in x direction number of pockets in y direction VALUE 14.86 mm 4.45 mm 12.76 mm 2.34 mm 50.8 mm 50.8 mm 3 10
DIMENSIONS A
handbook, halfpage
B C D E F -
MGW641
PCF8831
-
The orientation of the IC in a pocket is indicated by the position of the IC type name on the die surface with respect to the chamfer on the upper left corner of the tray. Refer to the bonding pad location diagram for the orientation and position of the type name on the die surface.
Fig.15 Tray alignment.
2002 Aug 14
23
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
16 DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS
PCF8831
Preliminary data
Qualification
Product data
Production
This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 17 DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 18 DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products 2002 Aug 14 24 for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Bare die All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used.
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
NOTES
PCF8831
2002 Aug 14
25
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
NOTES
PCF8831
2002 Aug 14
26
Philips Semiconductors
Preliminary specification
STN RGB - 160 output row driver
NOTES
PCF8831
2002 Aug 14
27
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403512/01/pp28
Date of release: 2002
Aug 14
Document order number:
9397 750 09145

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